This invention relates generally to methods and circuits for use in systems having analog-to-digital converter circuits, particularly methods and circuits for conditioning a signal prior to converting it to a digitally coded signal using an analog-to-digital converter circuit.
In electronic systems and instruments, it is often desirable to employ an analog-to-digital converter circuit ("ADC") that converts a received analog signal into a digitally coded signal. For example, oscilloscopes often use an ADC to convert a received analog signal into digital information so that such information can be digitally stored, processed and, ultimately, displayed in an analog form.
An ADC theoretically converts into a digitally coded signal the instantaneous value of a received analog signal at a selected moment. However, in practice ADCs are characterized by input signal apertures such that, rather than converting the received analog signal's instantaneous value, the ADC is sensitive to the received analog signal over a period of time corresponding to and in accordance with the ADC's input signal aperture. Over that period the received analog signal may be changing in value. Because all such values contribute to the conversion, conversion errors are likely to occur. These errors tend to become significant as the received analog signal changes more dynamically during the input signal aperture, thereby creating a nominal conversion bandwidth for the ADC. These errors also tend to become more significant still when the input signal aperture describes a nonlinear function.
As a practical matter, this problem cannot be overcome solely by narrowing the ADC's input signal aperture. The capability to convert higher frequency signals accurately is an ever-existing challenge which, in the absence of any other solution, will require increasingly narrow apertures. While narrowing the aperture may be technologically and financially feasible in some circumstances, in other circumstances that approach is simply not feasible and alternate approaches are sought.
One alternate approach is to isolate the ADC from the received analog signal using a signal conditioning circuit. Signal conditioning circuits typically receive the received analog signal and provide to the converter circuit an analog signal that is representative of the received analog signal and has characteristics conducive to its accurate conversion. In general, signal conditioning circuits are designed to provide an analog signal that has a substantially unchanging value over the corresponding signal input aperture of the ADC, that value being representative of the received analog signal's instantaneous value at the moment selected for conversion. Using signal conditioning in this way, the effective bandwidth of the ADC is optimized without any redesign of the ADC itself. This is a significant advantage because signal conditioning circuits generally can be more readily designed for high bandwidth operation than can ADCs.
However, conventional signal conditioning circuits have significant limitations. One such conventional signal conditioning circuit is a track and hold ("TH") circuit, the operation of which is illustrated in FIG. 1. The TH circuit tracks the received analog signal 10 for a track period 14, which is a portion of a clock period 12, and holds an instantaneous value 18 of the received analog signal 10 for a hold period 16, which is the remaining portion of the clock period 12. The instantaneous value 18 during a given clock period 12 is that value present when the TH circuit transitions from tracking to holding at transition point 20 in that clock period. During the hold period 16, the ADC is clocked to convert the instantaneous value 18, then being held, into a digitally coded signal, the clocking in each clock period 12 being indicated in FIG. 1 by the asterisks 22. This method is repeated during subsequent clock periods 12.
Thence, the TH circuit provides to the ADC, in each clock period 12, a substantially unchanging analog signal (the instantaneous value 18) during a predetermined period of time (the hold period 16). However, outside that hold period 16 the TH circuit provides an analog signal to the ADC that changes with the received analog signal 10. Such changes in value may be substantial, especially at high frequency. To the extent that the ADC's input signal aperture falls outside the hold period 16, the conversion will reflect those changes in value and conversion errors may result. Because conversion errors become significant at higher frequencies, this has a bandwidth limiting effect on the use of the ADC. These errors become more significant still when the ADC's input signal aperture describes a nonlinear function.
To minimize such errors, the ADC generally is clocked in each clock period 12 so as to center its input signal aperture within the hold period 16. Even so, conversion errors arise whenever the input signal aperture is longer than the hold period 16. In that case, at least the aperture's extremities, or "tails," fall outside the hold period 16. Increasing the hold period 16 to capture the aperture's extremities is one approach to this problem. However, it is limited in that it reduces the track period 14, which must be kept sufficiently long to allow the TH circuit to rise to, and settle at, the current value of the received analog signal 10 before transition points 20 when the TH circuit transitions from the tracking period 14 to the subsequent holding period 16.
Another signal conditioning circuit is disclosed which uses sampling and filtering, the operation of which is illustrated in FIG. 2. See Rush and Byrne, "A 4 GHz 8b Data Acquisition System", Proceedings of the 1991IEEE International Solid-State Circuits Conference, 1991, pp. 176-177. This sample and filter ("SF") circuit takes samples 30 of the received analog signal 10 periodically, and then filters the samples using a passive filter. The samples 30 resemble impulses, as their duration is just long enough to allow rise to the received analog signal's instantaneous value. The passive filter produces an analog signal 34 which dynamically changes in value, having peaks 36 representative of the samples' values. The filter is designed so that peaks 36 are relatively flat. Because the sampling and filtering reduces the amplitude of the received analog signal 10, the analog signal is first amplified and then provided to the ADC for conversion. In the conversion of the analog signal 34, the ADC's input signal aperture is timed to coincide with the signal's peaks 36.
In the absence of the filter, the input to the ADC would be the samples 30, resembling an impulse train. Between the samples 30, the input would be substantially null. To the extent the ADC's input signal aperture is a linear function, these null inputs will not significantly affect the conversion. Thence, the input signal aperture of the ADC, if centered on a sample 30, could be as long as two sample periods 38. Stated another way, because the sample period 38 of the SF circuit illustrated in FIG. 2 equals the clock period 12 of the TH circuit illustrated in FIG. 1, the SF circuit could use an ADC having an aperture roughly four times greater than the aperture of the TH circuit (somewhat less if the hold period 18 is made greater than half the clock period 12), that is, it could use a much slower ADC.
However, the input signal aperture of an ADC will typically exhibit significant nonlinearities when converting impulses of varying amplitudes, leading to conversion errors. Accordingly, the SF circuit uses the passive filter to shape the analog signal 34, thereby alleviating the nonlinearities. Because the filter itself has an input signal aperture, the ADC must have an aperture no greater than two sample periods 38 less the length of the filter's aperture.
Though the SF circuit has some advantages, it has significant disadvantages. It requires a well-designed filter, which typically cannot be implemented on an integrated circuit with the ADC, and it requires an amplifier to boost the analog signal. Most significantly, it converts an analog signal at a time when that signal is changing. Because its peaks are curved, the analog signal 34 will have a range of values during the input signal aperture, all contributing to the conversion, possibly leading to significant conversion errors due to nonlinearities. If these errors are not addressed, they can be a significant disadvantage. On the other hand, addressing the errors is also a disadvantage in that it requires characterizing the response of the signal conditioning circuit together with the ADC and, with that information, adding a correction capability (such as a look-up table or an interpolation device) to the output of the ADC.
Accordingly, there is a need for an improved method and circuit for conditioning a received analog signal prior to converting it to a digitally coded signal using an ADC.